THE CONNECTED COLLECTION

The semiconductor reference library

Architecture is a relationship, not a specification label. Follow companies, instruction sets, cores, processes, packages and source documents into the objects they explain.

process

Intel 14 nm (2014 disclosure)

Intel’s 2014 process uses second-generation tri-gate FinFETs. The manufacturer disclosed 42 nm fin pitch, 70 nm gate pitch and 52 nm interconnect pitch; these physical dimensions are distinct from the 14 nm generation name. Intel identified Core M as the first product manufactured on the process and reported volume production in August 2014. This entry describes that dated process implementation, without assigning those pitches to every later Intel 14 nm variant.

2 sources · structured · 3 connections
process

Samsung SF2

Samsung SF2 is a named foundry process. Its dated PPA claims retain the manufacturer’s own reference node and measurement conditions.

2 sources · structured · 0 connections
process

TSMC N2

TSMC N2 is a named foundry process. Its dated PPA claims retain the manufacturer’s own reference node and measurement conditions.

2 sources · structured · 0 connections
process

TSMC N7

TSMC 7nm FinFET process technology; distinct from the later N7+ EUV process.

1 sources · structured · 1 connections

Dates and historical archive claims retain their original capture context. A process marketing name is not a measured feature dimension.

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