PROCESS

TSMC N2

TSMC N2 is a named foundry process. Its dated PPA claims retain the manufacturer’s own reference node and measurement conditions.

Identity & fabrication
Production status
Manufacturer / primary sourceTSMC

Scope: N2

Conditions: Vendor statement read 2026-09-14; page has no publication date.

Packaging, power & physical analysis
Transistor architecture
Manufacturer / primary sourceTSMC

Scope: process-variant

Source date: 2022-06-17

Additional specifications
PPA baseline
Manufacturer / primary sourceTSMC

Scope: process-variant

Source date: 2022-06-17

Performance improvement
Manufacturer / primary sourceTSMC

Scope: process-variant

Baseline: TSMC N3 (2022 disclosure)

Conditions: Same power; test design and operating point not specified in release.

Source date: 2022-06-17

Power reduction
Manufacturer / primary sourceTSMC

Scope: process-variant

Baseline: TSMC N3 (2022 disclosure)

Conditions: Same speed; test design and operating point not specified in release.

Source date: 2022-06-17

Density definition
Manufacturer / primary sourceTSMC

Scope: process-variant

Source date: 2022-06-17

Not found in this checked release; does not claim universal non-disclosure.

Help document this silicon.

We have not yet identified a reliable public visual source for this record. Suggest a die photograph, package image, paper or manufacturer diagram.

Sources and historical context

N2 process introduction, Technology Symposium 2022

TSMC · official-disclosure · source linked

2nm technology: production statement

TSMC · official-disclosure · source linked