VLSI KoreaComplementary FET research structure
imec describes CFET as stacked nMOS and pMOS with monolithic and sequential integration schemes under research.
1 sources · researched · 0 connectionsTHE CONNECTED COLLECTION
반도체 기술 레퍼런스
아키텍처를 하나의 사양 표기로 끝내지 않습니다. 기업·명령어 집합·코어·공정·패키지·문서에서 연결된 실리콘으로 이어가세요.
아키텍처
2x Zen 4 , 4x Zen 4c14004165021800828080298086308018610280286378048679A171A182A192전체 보기 →공정
0.5 µm90.6 µm10.8 µm80.13 µm40.15 µm10.18 µm320.25 or 0.35um80.25 µm850.35 µm20.75 µm11 µm141.5 µm43전체 보기 →기업
Intel7,480STMicroelectronics2,117AMD1,254Freescale755Zilog649MSI634ASUS581Gigabyte449Rockwell296CMD290EVGA263National Semiconductor246전체 보기 →Discrete silicon-carbide MOSFET
Wolfspeed lists discrete SiC MOSFETs for power systems, with package and blocking-voltage filters.
1 sources · researched · 0 connectionsFinFET logic transistor
A FinFET is contrasted with GAA by gate material on three channel sides.
1 sources · researched · 1 connectionsGate-all-around transistor
In a GAA transistor, gate material completely encircles the channel; imec reports Si GAA nMOS and pMOS research devices.
3 sources · researched · 1 connectionsIBM 45-nm SOI CMOS technology
This IEDM 2006 implementation combines SOI CMOS, enhanced strain, immersion lithography and porous low-k back-end dielectrics. IBM reports functional 0.37 µm² SRAM cells and PFET/NFET saturation drive currents of 840/1240 µA per µm at 1.0 V. These are process demonstration results; the nominal 45 nm label is not a measurement of every transistor dimension.
1 sources · structured · 0 connectionsInfineon BFP450
BFP450 is a surface-mount silicon NPN transistor for wideband RF amplification. Its datasheet separates minimum breakdown limits from typical small-signal gain and linearity. At 900 MHz, 3 V collector-emitter bias and 90 mA collector current, the reported maximum power gain is 23.5 dB while transducer gain is 19 dB. These metrics use different gain definitions; they must not be treated as interchangeable amplifier performance or as guaranteed values across frequency and bias.
1 sources · structured · 0 connectionsInfineon IGC27T120T8L
A 1200 V trench and fieldstop IGBT supplied as bare die for power modules. The nominal 25 A rating assumes a packaged module at 100°C case temperature. Its 2.07 V maximum saturation voltage is a 25°C static on-wafer result; the separate 150°C specification is 2.25 V typical. These conditions prevent a misleading comparison between nominal current, absolute ratings and hot-junction behavior.
2 sources · structured · 0 connectionsInfineon IRF7726
A commercial P-channel planar power MOSFET in a Micro-8 package. Its −30 V voltage limit and −7 A current rating describe different specified operating constraints; neither is a measured efficiency result. The 26 mΩ maximum on-resistance applies at −10 V gate drive, −7 A drain current and 25°C junction temperature.
2 sources · structured · 0 connectionsPhotodiode
Hamamatsu identifies Si/InGaAs photodiode families, arrays/modules, and light-position, imaging, spectrophotometry, and near-infrared applications.
1 sources · researched · 0 connectionsPlanar MOSFET structure
This educational cross-section diagram identifies the source, drain, gate, insulating layer and substrate of a MOSFET. It is a schematic, not a TEM or SEM micrograph, and it provides no measured process dimensions.
1 sources · researched · 2 connectionsPower MOSFET
Infineon’s catalogue includes Si/SiC products, n/p-channel families, modules, bare die, and industrial/automotive contexts.
1 sources · researched · 0 connectionsPower MOSFET package specimen
A photographed discrete power MOSFET in a through-hole package. The visible metal tab, package body and three leads show the external assembly. This photograph does not establish the internal cell structure, voltage rating or process technology.
1 sources · researched · 1 connectionsStacked-nanosheet GAA transistor
imec identifies vertically stacked nanosheets as a GAA implementation in scaling research.
1 sources · researched · 0 connectionsStacked-nanowire GAA transistor
imec reported vertically stacked-nanowire GAA research with Si nMOS/pMOS results; it is not a commercial product claim.
1 sources · researched · 0 connections날짜와 과거 아카이브 정보에는 당시의 맥락을 유지합니다. 공정 이름은 실측 치수가 아닙니다.
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