Apple M1 Ultra

Mac Studio용으로 발표된 Apple의 데스크톱 SoC로, UltraFusion을 통해 두 개의 M1 Max 다이로 구현됩니다.

AppleSoC

사양

2 SOURCE-LINKED FIELDS

Identity & fabrication
Record year	Manufacturer / primary sourceApple Scope: M1 Ultra product SoC Source date: 2022-03-08 Year basis: announced.
Additional specifications
M1 Max dies	Manufacturer / primary sourceApple Scope: M1 Ultra package Source date: 2022-03-08 Apple describes the die of two M1 Max chips connected using UltraFusion.

Identity & fabrication

Record year

Manufacturer / primary sourceApple

Scope: M1 Ultra product SoC

Source date: 2022-03-08

Year basis: announced.

Additional specifications

M1 Max dies

Manufacturer / primary sourceApple

Scope: M1 Ultra package

Source date: 2022-03-08

Apple describes the die of two M1 Max chips connected using UltraFusion.

THE VISUAL EVIDENCE

시각 자료

1 개의 확인된 출처

아래의 추가 시각 자료는 게시자의 사이트에서 열립니다.

Chiplet layout외부 출처 ↗

M1 Ultra — UltraFusion packaging diagram

Apple

주석 포함2022-03-081차 출처

Apple’s labeled packaging illustration shows how two M1 Max dies form M1 Ultra. This is an official explanatory visual, not a physical die photograph.

원본 시각 자료 보기

권리 · 출처 · 링크 이력

Rights status: UNKNOWN
Licence: 재사용 허가 확인 안 됨
Local hosting / thumbnails / hotlinking: Not enabled / Not enabled / Not enabled
Attribution: Apple
Identity / confidence: matched / high
Evidence reviewed: 2026-09-07
Link checked: 2026-09-07 · ok · HTTP 200

원문 열람 가능 여부와 이미지 재사용 권한은 별개입니다.

TECHNICAL ARTICLE

M1 Ultra: two dies treated as one SoC

Apple’s announcement identifies UltraFusion as the packaging path that connects two M1 Max dies to form M1 Ultra.

인용한 출처를 바탕으로 작성한 VLSI Museum의 해설입니다. · 2026-09-07

Scaling at the package boundary

M1 Ultra joins two M1 Max dies. Compute scales across a package boundary, while software sees one chip. A photograph of one constituent die therefore describes only part of the product.

PRIMARY SOURCEApple

The interconnect makes the design possible

Apple specifies a silicon interposer with more than 10,000 signals and 2.5 TB/s of inter-processor bandwidth. Keeping communication close to the dies supports the unified programming model; Apple presents this as an alternative to motherboard-level links.

PRIMARY SOURCEApple

Read the visual at the right scale

The official package illustration is useful for understanding connectivity. It is not an optical die photograph, and it does not establish undocumented physical dimensions or layer construction.

PUBLISHED ANALYSISApple

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