VLSI MUSEUM / ENGINEERING RECORDUNDATED

AMD7 nm

silicon design

The engineering record starts here.

We have not yet identified a reliable public die photograph for this record. Its identity and documented evidence remain open to explore.

SILICON DESIGN / DATE NOT RECORDED

AMD Zen 3 CCD

Zen 3 compute die with an officially disclosed 81 mm² area. Separate from the damaged Ryzen 5 5600X specimen in the photo collection. The area does not include the I/O die or optional stacked cache.

AMDCPUZen 3

Research connections

CompanyAMD ↗SeriesAMD Zen CCD ↗ArchitectureZen 3 ↗Process7 nm ↗

Specifications

1 SOURCE-LINKED FIELDS

Die area	Manufacturer / primary sourceAMD / ISSCC, publicly uploaded by AMD Scope: One Zen 3 7nm CPU Compute Die (CCD), design-level disclosure Excludes separate I/O die, package, and optional stacked 3D V-Cache die. The 68 mm² CCX value on slide 14 is only a sub-block.

Die area

Manufacturer / primary sourceAMD / ISSCC, publicly uploaded by AMD

Scope: One Zen 3 7nm CPU Compute Die (CCD), design-level disclosure

Excludes separate I/O die, package, and optional stacked 3D V-Cache die. The 68 mm² CCX value on slide 14 is only a sub-block.

THE VISUAL EVIDENCE

Visual sources

0 DOCUMENTED SOURCES

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Follow the connections

1 SOURCE-LINKED RELATIONSHIPS

Photographed specimenAMD Zen 3 CCD specimenspecimen

The damaged Zen 3 CCD photograph shows a specimen of this architecture. Design-level area is not a measurement of the surviving damaged specimen or a photo calibration.

AMD / ISSCC, publicly uploaded by AMD · Evidence

Record identity & scope

silicon design · AMD Zen 3 CCD

Zen 3 CPU Compute Die