SEMICONDUCTOR REFERENCE
Explore the collection
Find products, devices, processes and manufacturing tools with specifications and original sources.
Specification query syntax
Use cores, threads, clock, boost, l2, l3, tdp, memory or year with =, >=, <=, > or <. Units: GHz, MB, W, GB. Unknown or conflicting values do not match numeric conditions.
Results
cpu
| Compare | Entity | CPU organization | Clock / peak | Cache | Process label | Die area |
|---|---|---|---|---|---|---|
AMD Zen 2 CCDAMD · silicon die · 2019 | 2 CCXsCCXs per CCDphysical core-complex die | unresearched | 16 MBMaximum L3 per CCXphysical core-complex die | unresearched | 74 mm²Die areaOne Zen 2 7nm CPU Core Complex Die (CCD), design-level disclosure | |
Intel 4004Intel · silicon die · 1971 | unresearched | unresearched | unresearched | 10 µmProcess labelprocessor design | unresearched | |
Intel 8086Intel · silicon die · 1978 | unresearched | unresearched | unresearched | 3 µmProcess labelprocessor design | unresearched | |
MOS Technology 6502MOS Technology · silicon die · 1975 | unresearched | unresearched | unresearched | unresearched | unresearched | |
Intel386 DXIntel · product family · 1985 | unresearched | unresearched | unresearched | unresearched | unresearched | |
Intel Pentium 60/66 MHzIntel · silicon die · 1993 | unresearched | unresearched | unresearched | 0.8 µmProcess labeloriginal 60/66 MHz models | unresearched | |
AMD Ryzen 5 3600AMD · product model · 2019 | unresearched | unresearched | 32 MBL3 cachecomplete processor product | unresearched | unresearched | |
AMD Ryzen 5 5600XAMD · product model · 2020 | unresearched | unresearched | 32 MBL3 cachecomplete processor product | unresearched | unresearched |
gpu
| Compare | Entity | Compute organization | Local memory | External memory | Memory bandwidth | Die area |
|---|---|---|---|---|---|---|
NVIDIA GeForce 256NVIDIA · silicon die · 1999 | unresearched | unresearched | unresearched | unresearched | unresearched | |
NVIDIA GH100 full GPU designNVIDIA · silicon die · 2022 | unresearched | unresearched | unresearched | unresearched | 814 mm²Die areaOne full GH100 silicon die powering H100 |
specimen
| Compare | Entity | Subject | Package | Die area |
|---|---|---|---|---|
AMD Zen 3 CCD specimenAMD · physical specimen | unresearched | unresearched | unresearched |
accelerator
| Compare | Entity | Compute organization | Local memory | External memory | Memory bandwidth | Die area |
|---|---|---|---|---|---|---|
NVIDIA A100NVIDIA · silicon die · 2020 | unresearched | unresearched | unresearched | unresearched | 826 mm²Die areaOne GA100 silicon die powering A100 |
Compare specifications
Source values, conditions and entity scope stay together.
| Specification / evidence | Apple M1silicon-die | Apple M2silicon-die | Apple M3silicon-die | Apple M4silicon-die |
|---|---|---|---|---|
| Record year | official-disclosure · sourcedScope: SoC designSource date: 2020-11-10Year basis: announced. This is distinct from source publication and record update.Source ↗ | official-disclosure · sourcedScope: SoC designSource date: 2022-06-06Year basis: announced. This is distinct from source publication and record update.Source ↗ | official-disclosure · sourcedScope: base M3 SoC designSource date: 2023-10-30Year basis: announced. This is distinct from source publication and record update.Source ↗ | official-disclosure · sourcedScope: SoC design; configurations varySource date: 2024-05-07Year basis: announced. This is distinct from source publication and record update.Source ↗ |
| Transistors | official-disclosure · sourcedScope: SoC designSource date: 2020-11-10Source ↗ | official-disclosure · sourcedScope: SoC designSource date: 2022-06-06Source ↗ | official-disclosure · sourcedScope: base M3 SoC designSource date: 2023-10-30Source ↗ | official-disclosure · sourcedScope: SoC design; configurations varySource date: 2024-05-07Source ↗ |
| Process label | official-disclosure · sourcedScope: SoC designSource date: 2020-11-10Source ↗ | official-disclosure · sourcedScope: SoC designSource date: 2022-06-06Source ↗ | official-disclosure · sourcedScope: base M3 SoC designSource date: 2023-10-30Source ↗ | official-disclosure · sourcedScope: SoC design; configurations varySource date: 2024-05-07Source ↗ |
| CPU cores | official-disclosure · sourcedScope: SoC designSource date: 2020-11-10Source ↗ | Unresearched for this record | official-disclosure · sourcedScope: base M3 SoC designSource date: 2023-10-30Source ↗ | Unresearched for this record |
| CPU composition | official-disclosure · sourcedScope: SoC designSource date: 2020-11-10Source ↗ | Unresearched for this record | Unresearched for this record | Unresearched for this record |
| Die area | independent-measurement · sourcedScope: Base M1 physical die measured by original author; part obtained in 2020Original analyst self-reported physical measurement. Instrument, boundary convention and uncertainty are not published. Stated area is retained; product of rounded dimensions is 122.7088 mm². Post also discusses preliminary M1 Pro/Max estimates; do not transfer those estimates.Source ↗ | Unresearched for this record | Unresearched for this record | Unresearched for this record |
| Die width | independent-measurement · sourcedScope: Base M1 physical die measured by original author; part obtained in 2020Ordered x/y dimensions as stated by author; reference image orientation and die-edge boundary convention are not specified.Source ↗ | Unresearched for this record | Unresearched for this record | Unresearched for this record |
| Die height | independent-measurement · sourcedScope: Base M1 physical die measured by original author; part obtained in 2020Ordered x/y dimensions as stated by author; reference image orientation and die-edge boundary convention are not specified.Source ↗ | Unresearched for this record | Unresearched for this record | Unresearched for this record |
| Unified memory bandwidth | Unresearched for this record | official-disclosure · sourcedScope: SoC designSource date: 2022-06-06Source ↗ | Unresearched for this record | Unresearched for this record |
| Maximum unified memory | Unresearched for this record | official-disclosure · sourcedScope: SoC designSource date: 2022-06-06Source ↗ | official-disclosure · sourcedScope: base M3 SoC designSource date: 2023-10-30Source ↗ | Unresearched for this record |
| Maximum CPU cores | Unresearched for this record | Unresearched for this record | Unresearched for this record | official-disclosure · sourcedScope: SoC design; configurations varySource date: 2024-05-07Source ↗ |
Measured benchmarks must include workload/version, configuration, power mode and date. Theoretical peaks and vendor claims are not measured benchmark results.





