MEDIATEK / SILICON DESIGN

MediaTek Dimensity 9300

All-big-core flagship with Cortex-X4/A720 CPU, Immortalis-G720 and seventh-generation APU.

Image courtesy of Chipwise ·Used with permission

700 × 593 PX SOURCE / 100%

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Image courtesy of Chipwise ·Used with permission· Die photograph · Resized and format-converted for display; original image content and watermarks preserved.

Origin & contributions

Original source · Retrieved 2026-09-09

Chipwise / NanoPhysics · photographer · Included in this image

Image courtesy of Chipwise · Used with permission. Link the original Chipwise source page and retain its markings and credits. Permission reported by the Museum operator on 2026-09-09. Display resizing and format conversion only; no removal of annotations or watermarks. No onward redistribution or comparison-export licence is granted by the Museum.

MediaTek Dimensity 9300. See source caption; no chip layer inferred beyond source evidence

Source photography; preparation and visible markings are preserved. This photograph supplies no independently verified geometric measurements.

Original & higher resolution

Specifications

13 SOURCE-LINKED FIELDS

Identity & fabrication
Year	Manufacturer / primary sourceMediaTek Scope: silicon-die Source date: 2023-11-06 Year identifies first public introduction where a dated launch is available; see record notes for exceptions.
Process	Manufacturer / primary sourceMediaTek Scope: silicon-die
Foundry	Manufacturer / primary sourceMediaTek Scope: silicon-die
CPU & clock domains
CPU	Manufacturer / primary sourceMediaTek Scope: silicon-die
CPU design	Manufacturer / primary sourceMediaTek Scope: silicon-die
Graphics
GPU	Manufacturer / primary sourceMediaTek Scope: silicon-die
AI & security
AI	Manufacturer / primary sourceMediaTek Scope: silicon-die
Memory & interfaces
Memory	Manufacturer / primary sourceMediaTek Scope: silicon-die
Storage	Manufacturer / primary sourceMediaTek Scope: silicon-die
Packaging, power & physical analysis
Reported die width	Published analysisKurnal Insights Scope: silicon-die Source date: 2026-05-19 Original analyst catalog value. Public entry gives dimensions but does not document calibration, die boundary convention, specimen provenance or uncertainty.
Reported die height	Published analysisKurnal Insights Scope: silicon-die Source date: 2026-05-19 Original analyst catalog value. Public entry gives dimensions but does not document calibration, die boundary convention, specimen provenance or uncertainty.
Reported die area	Published analysisKurnal Insights Scope: silicon-die Source date: 2026-05-19 Original analyst catalog value. Public entry gives dimensions but does not document calibration, die boundary convention, specimen provenance or uncertainty.
Verified die geometry	UnconfirmedMediaTek Scope: silicon-die Source date: 2023-11-06 No source meeting calibrated geometry requirements accepted in this scout pass. Reported measurements, if present, remain separately labeled.

Source-linked recordEditorial update 2026-09-09

ARCHITECTURE → RTL → GDS

Design with this record

All design guides ↗

Start with documented specifications, then use the study prompts below. The prompts are engineering guidance, not a claim about this product’s private RTL or physical implementation.

GPU: MediaTek ↗
Process: MediaTek ↗
Memory: MediaTek ↗
Storage: MediaTek ↗
Reported die area: Kurnal Insights ↗

Workload and traffic model

Build a traffic matrix across the documented CPU, graphics, AI and I/O engines. Model concurrent bursts, locality and worst-case response time at shared memory before choosing arbitration or buffering.

Contracts before RTL

Choose a representative producer/consumer path and specify acceptance, ordering, backpressure, outstanding capacity and reset recovery. Turn these contracts into assertions and test scenarios before optimizing the datapath.

A feasible physical plan

Obtain macro abstracts, pin maps, timing libraries and activity-based power estimates. Explore macro proximity, routing channels and power-grid reachability together. An annotated die photograph can suggest study questions, but cannot supply a netlist, PDK or signoff constraints.

Read the record in its physical scope.

All-big-core flagship with Cortex-X4/A720 CPU, Immortalis-G720 and seventh-generation APU.

This record has identification and source evidence. A deeper architectural article has not yet been written. Visible patterns alone do not establish block functions, capacity or an internal protocol.

Follow the connections

2 SOURCE-LINKED RELATIONSHIPS

member ofMediaTek Dimensity flagship familyproduct family

Product-series membership; does not assert shared masks or identical silicon.

MediaTek · Evidence

SuccessorMediaTek Dimensity 9400silicon design

MediaTek names Dimensity 9300 as previous-generation flagship.

MediaTek · Evidence

THE VISUAL EVIDENCE

Visual sources

3 DOCUMENTED SOURCES

Die photographs shared by their authors on X. Open a post to explore its images and discussion.

Die photograph · X

MediaTek Dimensity 9300 (MT6989) Dieshot Layout

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MediaTek Dimensity 9300 (MT6989) Dieshot LayoutKurnal @Kurnalsalts · 2024-03-13View original post on X

Hosted image provenance · 2

Die photographHosted in Museum