MEDIATEK / SILICON DESIGN

MediaTek Dimensity 930

TSMC N6 SoC with Cortex-A78 cores, IMG BXM-8-256 graphics, LPDDR5 and UFS 3.1.

Image courtesy of Chipwise ·Used with permission

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Image courtesy of Chipwise ·Used with permission· Die photograph · Resized and format-converted for display; original image content and watermarks preserved.

Origin & contributions

Original source · Retrieved 2026-09-09

Chipwise / NanoPhysics · photographer · Included in this image

Image courtesy of Chipwise · Used with permission. Link the original Chipwise source page and retain its markings and credits. Permission reported by the Museum operator on 2026-09-09. Display resizing and format conversion only; no removal of annotations or watermarks. No onward redistribution or comparison-export licence is granted by the Museum.

MediaTek Dimensity 930. Backside/deprocessed die view, as identified by source

Source photography; preparation and visible markings are preserved. This photograph supplies no independently verified geometric measurements.

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Specifications

9 SOURCE-LINKED FIELDS

Identity & fabrication
Process	Manufacturer / primary sourceMediaTek Scope: silicon-die
CPU & clock domains
CPU performance cores	Manufacturer / primary sourceMediaTek Scope: silicon-die
CPU efficiency cores	Manufacturer / primary sourceMediaTek Scope: silicon-die
Graphics
GPU	Manufacturer / primary sourceMediaTek Scope: silicon-die
Memory & interfaces
Memory	Manufacturer / primary sourceMediaTek Scope: silicon-die
Storage	Manufacturer / primary sourceMediaTek Scope: silicon-die
Camera, video & display
Camera	Manufacturer / primary sourceMediaTek Scope: silicon-die
Display	Manufacturer / primary sourceMediaTek Scope: silicon-die
Connectivity & devices
Connectivity	Manufacturer / primary sourceMediaTek Scope: silicon-die

Source-linked recordRecord verified 2026-09-09

ARCHITECTURE → RTL → GDS

Design with this record

All design guides ↗

Start with documented specifications, then use the study prompts below. The prompts are engineering guidance, not a claim about this product’s private RTL or physical implementation.

GPU: MediaTek ↗
Process: MediaTek ↗
Memory: MediaTek ↗
Storage: MediaTek ↗

Workload and traffic model

Build a traffic matrix across the documented CPU, graphics, AI and I/O engines. Model concurrent bursts, locality and worst-case response time at shared memory before choosing arbitration or buffering.

Contracts before RTL

Choose a representative producer/consumer path and specify acceptance, ordering, backpressure, outstanding capacity and reset recovery. Turn these contracts into assertions and test scenarios before optimizing the datapath.

A feasible physical plan

Obtain macro abstracts, pin maps, timing libraries and activity-based power estimates. Explore macro proximity, routing channels and power-grid reachability together. An annotated die photograph can suggest study questions, but cannot supply a netlist, PDK or signoff constraints.

Read the record in its physical scope.

TSMC N6 SoC with Cortex-A78 cores, IMG BXM-8-256 graphics, LPDDR5 and UFS 3.1.

This record has identification and source evidence. A deeper architectural article has not yet been written. Visible patterns alone do not establish block functions, capacity or an internal protocol.

THE VISUAL EVIDENCE

Visual sources

4 DOCUMENTED SOURCES

Die photographs shared by their authors on X. Open a post to explore its images and discussion.

Die photograph · X

MediaTek Dimensity 930 — die photograph

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MediaTek Dimensity 930 — die photographKurnal @Kurnalsalts · 2023-11-23View original post on X

Hosted image provenance · 3

Die photographHosted in Museum