모든 기술 노트
VLSI TECHNICAL NOTE

Two dies inside one GD32F103 package

Separate logic and flash photographs make the distinction between a product, a package and a physical die concrete.

VLSI Museum · 2026-09-06 · Original AI-assisted synthesis of published evidence; no VLSI physical teardown or human architect review is claimed.

Source report

ZeptoBars identifies two silicon pieces from a GD32F103CBT6 package: a logic/SRAM die and a separate flash die. The article reports nine connections from the larger die to the flash die. One microcontroller product therefore corresponds to two photographed physical dies in this specimen.

Source evidence
Image observation

The photographs preserve different outlines, pad arrangements and surface patterns. They let us inspect those differences without treating a package label as a picture of one monolithic chip. Regular patterns alone do not establish a memory capacity or recover the underlying netlist.

Source evidence
VLSI interpretation

This separation raises a data-movement question: how does the controller obtain instructions and data from the other die? The images do not establish transfer width, protocol timing, buffering or sustained throughput. A performance explanation needs documentary evidence or reproducible measurements beyond visible metal. Museum retains both originals and leaves unverified geometry out of physical-scale comparisons.

Source evidence