VLSI Koreasilicon design
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관련 기술 탐색
사양
5 SOURCE-LINKED FIELDS| Identity & fabrication | |
|---|---|
| Record year | Manufacturer / primary sourceIBM Scope: one central-processor die, not the dual-chip module Source date: 2021-08-23 Year basis: announced. This is distinct from source publication and record update. |
| Process label | Manufacturer / primary sourceIBM Research Scope: one central-processor die, not the dual-chip module Source date: 2022-02-19 The ISSCC abstract explicitly reports 22B per CP die; the 2021 press release uses ambiguous dual-chip-module wording. |
| CPU & clock domains | |
| CPU cores per die | Manufacturer / primary sourceIBM Research Scope: one central-processor die, not the dual-chip module Source date: 2022-02-19 The ISSCC abstract explicitly reports 22B per CP die; the 2021 press release uses ambiguous dual-chip-module wording. |
| Packaging, power & physical analysis | |
| Transistors per die | Manufacturer / primary sourceIBM Research Scope: one central-processor die, not the dual-chip module Source date: 2022-02-19 22 billion is per CP die in the ISSCC abstract. The press release refers to a dual-chip module; do not treat that module count as a per-die claim. |
| Die area | Manufacturer / primary sourceIBM Research Scope: One first-generation Telum central-processor die (CP) Source date: 2022-02-19 Each dual-chip module contains two CP dies. 530 mm² is one die, not the 16-core DCM total. |
시각 자료
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이 기록의 신뢰할 수 있는 공개 시각 자료는 아직 확인하지 못했습니다. 다이 사진·패키지 이미지·논문·제조사 도해를 제안할 수 있습니다.
표면 아래의 이야기.
The ISSCC abstract identifies eight cores, 22 billion transistors and 530 mm² for one Telum central-processor die. The dual-chip module discussed in the announcement is a different physical object.
CURATOR INTERPRETATIONChoosing the physical boundary changes the meaning of a comparison. A single-die area can be placed on a shared silicon scale; a module-wide count cannot be silently substituted for its per-die count.