VLSI KoreaDEVICE
Stacked-nanosheet GAA transistor
imec identifies vertically stacked nanosheets as a GAA implementation in scaling research.
nanosheet GAAstacked nanosheet
- operating Family
- MOSFET
- gate Geometry
- gate-all-around ยท nanosheet
Specifications
3 SOURCE-LINKED FIELDS| Channel implementation | Manufacturer / primary sourceimec Scope: research-implementation Source date: 2018-12-03 |
|---|---|
| Scaling context | Manufacturer / primary sourceimec Scope: research-implementation Source date: 2018-12-03 |
| Footprint claim | Manufacturer / primary sourceimec Scope: research-implementation Source date: 2018-12-03 |
THE VISUAL EVIDENCE
0 DOCUMENTED SOURCESVisual sources
Help document this silicon.
We have not yet identified a reliable public visual source for this record. Suggest a die photograph, package image, paper or manufacturer diagram.
Sources and historical context
Imec improves performance and understanding of stacked nanowire Gate-All-Around transistors for N3 and beyond
imec ยท official-disclosure ยท source linked