Alder Lake

Intel microarchitectures alder lake

Specifications

17 SOURCE-LINKED FIELDS

Identity & fabrication
Architecture name	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Foundry	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Introduction	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Process	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Architecture core count	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
ISA	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Architecture predecessor	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Architecture predecessor	Published analysisChipsWiki / WikiChip contributors Scope: predecessor 2 Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Architecture predecessor	Published analysisChipsWiki / WikiChip contributors Scope: predecessor 3 Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Architecture successor	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Architecture successor	Published analysisChipsWiki / WikiChip contributors Scope: successor 2 Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Cache hierarchy
L1 cache	Published analysisChipsWiki / WikiChip contributors Scope: core Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
L2 cache	Published analysisChipsWiki / WikiChip contributors Scope: core Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
L3 cache	Published analysisChipsWiki / WikiChip contributors Scope: architecture scope Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Additional specifications
Designer	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: core name 2 Source date: 2022-10-11 Source-reported parameter; source revision 2022-10-11. Not an independent measurement.

THE VISUAL EVIDENCE

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Sources and historical context

Alder Lake — ChipsWiki, revision 97011

ChipsWiki / WikiChip contributors · third-party-report · source linked