VLSI MUSEUM / ENGINEERING RECORD2017

AMD14 nm

sku

The engineering record starts here.

We have not yet identified a reliable public die photograph for this record. Its identity and documented evidence remain open to explore.

SKU / 2017

AMD Ryzen 3 1200

CPU SKU · Ryzen 3 1000

AMDCPUZen

Research connections

CompanyAMD ↗SeriesRyzen 3 1000 ↗ArchitectureZen ↗Process14 nm ↗PackageµOPGA-1331 ↗

WikiChip archive references

Matched archive addresses are research leads. Capture metadata alone does not verify a specification; field-level evidence is listed below.

amd/ryzen 3/1200 · 2020-11-12 ↗AMD Ryzen 3 1200 · 2022-05-17 ↗Ryzen 3 1200 · 2021-09-17 ↗

Specifications

60 SOURCE-LINKED FIELDS

Identity & fabrication
Record scope	Published analysisBuildCores community Scope: product-model
Part numbers	Published analysisBuildCores community Scope: product-model
Release year	Published analysisBuildCores community Scope: product-model
Series	Published analysisBuildCores community Scope: product-model
Architecture	Published analysisBuildCores community Matching source values (1) Zen · ChipsWiki / WikiChip contributors Amd/ryzen 3/1200 · revision 5916 · {{chip}} / microarch · Shared upstream; not independent confirmation. Scope: product-model
Process	Published analysisBuildCores community Matching source values (1) 14 nm · ChipsWiki / WikiChip contributors Amd/ryzen 3/1200 · revision 5916 · {{chip}} / process · Shared upstream; not independent confirmation. Scope: product-model Source process label; mixed chiplet processes and marketing names retained.
Model name	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Foundry	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Model number	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Part number	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Part number	Published analysisChipsWiki / WikiChip contributors Scope: part number 2 Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Market	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Announcement date	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Release date	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
ISA	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Stepping	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Process technology	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
CPU & clock domains
Core family	Published analysisBuildCores community Scope: product-model
Cores	Published analysisBuildCores community Matching source values (1) 4 · ChipsWiki / WikiChip contributors Amd/ryzen 3/1200 · revision 5916 · {{chip}} / core count · Shared upstream; not independent confirmation. Scope: product-model
Threads	Published analysisBuildCores community Matching source values (1) 4 · ChipsWiki / WikiChip contributors Amd/ryzen 3/1200 · revision 5916 · {{chip}} / thread count · Shared upstream; not independent confirmation. Scope: product-model
Base clock	Published analysisBuildCores community Matching source values (1) 3100 MHz · ChipsWiki / WikiChip contributors Amd/ryzen 3/1200 · revision 5916 · {{chip}} / frequency · Shared upstream; not independent confirmation. Scope: product-model
Boost clock	Published analysisBuildCores community Matching source values (1) 3400 MHz · ChipsWiki / WikiChip contributors Amd/ryzen 3/1200 · revision 5916 · {{chip}} / turbo frequency1 · Shared upstream; not independent confirmation. Scope: product-model
CPU family ID	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
CPU model ID	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
CPU word size	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Cache hierarchy
L2 cache	Published analysisBuildCores community Scope: product-model
L3 cache	Published analysisBuildCores community Scope: product-model
L1 cache	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
L1 instruction cache	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
L1 instruction organization	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
L1 instruction associativity	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
L1 data cache	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
L1 data organization	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
L1 data associativity	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
L2 organization	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
L2 associativity	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
L3 organization	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
L3 associativity	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Memory & interfaces
Memory types	Published analysisBuildCores community Scope: product-model
Memory channels	Published analysisBuildCores community Matching source values (1) 2 · ChipsWiki / WikiChip contributors Amd/ryzen 3/1200 · revision 5916 · {{memory controller}} / channels · Shared upstream; not independent confirmation. Scope: product-model
Maximum memory	Published analysisBuildCores community Scope: product-model
Host interface links	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Host interface rate	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Memory type	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Memory ECC	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Memory controllers	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Memory bandwidth	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Packaging, power & physical analysis
Socket	Published analysisBuildCores community Scope: product-model
Listed TDP	Published analysisBuildCores community Matching source values (1) 65 W · ChipsWiki / WikiChip contributors Amd/ryzen 3/1200 · revision 5916 · {{chip}} / tdp · Shared upstream; not independent confirmation. Scope: product-model Source-listed thermal design rating; not measured workload power.
Product packaging	Published analysisBuildCores community Scope: product-model
Transistors	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Die area	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Package	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2017-06-08 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Package type	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2017-06-08 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Package pins	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2017-06-08 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Additional specifications
Designer	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Product family	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Chipset	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.
Maximum CPU sockets	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-10-09 Source-reported parameter; source revision 2019-10-09. Not an independent measurement.

THE VISUAL EVIDENCE

Visual sources

0 DOCUMENTED SOURCES

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1 SOURCE-LINKED RELATIONSHIPS

Photographed specimenAMD Ryzen 3 1200 · Summit Ridgespecimen

The photographer identifies this specimen with the linked product name. This does not assert that every unit or revision has identical silicon, or that a die photograph depicts the full processor package.

Wikimedia Commons · Fritzchens Fritz from Berlin · Evidence

Record identity & scope

sku · AMD Ryzen 3 1200

116742 YD1200BBAEBOX Ryzen 3 1200 Amd ryzen 3 1200