AMD Zen

CPU microarchitecture named by AMD for the original Ryzen desktop generation. Follow the linked product and manufacturer evidence.

ZenAmd microarchitectures zen

Specifications

22 SOURCE-LINKED FIELDS

Identity & fabrication
Architecture name	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Foundry	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Introduction	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Process	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Architecture core count	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
ISA	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Architecture predecessor	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Architecture predecessor	Published analysisChipsWiki / WikiChip contributors Scope: predecessor 2 Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Architecture successor	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
CPU & clock domains
CPU execution type	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
CPU pipeline stages	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
CPU decode width	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Cache hierarchy
L2 cache	Published analysisChipsWiki / WikiChip contributors Scope: core Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
L3 cache	Published analysisChipsWiki / WikiChip contributors Scope: core Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Additional specifications
Designer	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: core name 2 Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: core name 3 Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: core name 4 Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: core name 5 Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: core name 6 Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: core name 7 Source date: 2021-11-10 Source-reported parameter; source revision 2021-11-10. Not an independent measurement.

THE VISUAL EVIDENCE

Visual sources

0 DOCUMENTED SOURCES

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Follow the connections

64 SOURCE-LINKED RELATIONSHIPS

ImplementationAMD Ryzen 5 1500Xsku

Archived identity matched to the existing SKU; relationship checked against AMD.

AMD · Evidence

Referenced by · implements architectureAthlon 3000Gsku