7 Series

Sifive microarchitectures 7 series

Specifications

18 SOURCE-LINKED FIELDS

Identity & fabrication
Architecture name	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
Foundry	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
Foundry	Published analysisChipsWiki / WikiChip contributors Scope: manufacturer 2 Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
Introduction	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
Architecture core count	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
ISA	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
Architecture predecessor	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
CPU & clock domains
CPU execution type	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
CPU execution type	Published analysisChipsWiki / WikiChip contributors Scope: type 2 Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
CPU pipeline stages	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
CPU decode width	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
Additional specifications
Designer	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: core name 2 Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: core name 3 Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: core name 4 Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: core name 5 Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.
Core name	Published analysisChipsWiki / WikiChip contributors Scope: core name 6 Source date: 2018-11-28 Source-reported parameter; source revision 2018-11-28. Not an independent measurement.

THE VISUAL EVIDENCE

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Sources and historical context

7 Series — ChipsWiki, revision 14046

ChipsWiki / WikiChip contributors · third-party-report · source linked