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ChipsWiki / WikiChip contributors · EvidenceVLSI MUSEUM / ENGINEERING RECORD2018
Intel14 nm
sku
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Core i7-8709G · 2025-08-12 ↗intel/core i7/i7-8709g · 2024-08-06 ↗Specifications
61 SOURCE-LINKED FIELDS| Identity & fabrication | |
|---|---|
| Model name | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Foundry | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Foundry | Published analysisChipsWiki / WikiChip contributors Scope: manufacturer 2 Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Model number | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Market | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Announcement date | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Release date | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Series | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| ISA | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Architecture | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Process | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Process technology | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| CPU & clock domains | |
| Base clock | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Boost clock | Published analysisChipsWiki / WikiChip contributors Scope: one active core Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| CPU family ID | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| CPU word size | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Cores | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Threads | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Cache hierarchy | |
| L1 cache | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| L1 instruction cache | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| L1 instruction organization | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| L1 instruction associativity | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| L1 data cache | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| L1 data organization | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| L1 data associativity | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| L2 cache | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| L2 organization | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| L2 associativity | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| L3 cache | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| L3 organization | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| L3 associativity | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Graphics | |
| GPU model — Graphics / Integrated graphics (section 1) | Published analysisChipsWiki / WikiChip contributors Scope: Graphics / Integrated graphics (section 1) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| GPU execution units — Graphics / Integrated graphics (section 1) | Published analysisChipsWiki / WikiChip contributors Scope: Graphics / Integrated graphics (section 1) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| GPU base clock — Graphics / Integrated graphics (section 1) | Published analysisChipsWiki / WikiChip contributors Scope: Graphics / Integrated graphics (section 1) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| GPU boost clock — Graphics / Integrated graphics (section 1) | Published analysisChipsWiki / WikiChip contributors Scope: Graphics / Integrated graphics (section 1) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| GPU model — Graphics / Discrete graphics (section 2) | Published analysisChipsWiki / WikiChip contributors Scope: Graphics / Discrete graphics (section 2) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| GPU execution units — Graphics / Discrete graphics (section 2) | Published analysisChipsWiki / WikiChip contributors Scope: Graphics / Discrete graphics (section 2) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| GPU base clock — Graphics / Discrete graphics (section 2) | Published analysisChipsWiki / WikiChip contributors Scope: Graphics / Discrete graphics (section 2) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| GPU boost clock — Graphics / Discrete graphics (section 2) | Published analysisChipsWiki / WikiChip contributors Scope: Graphics / Discrete graphics (section 2) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Memory & interfaces | |
| Host interface | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Host interface links | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Host interface rate | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Maximum memory | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Memory type — Memory controller (section 1) | Published analysisChipsWiki / WikiChip contributors Scope: Memory controller (section 1) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Memory ECC — Memory controller (section 1) | Published analysisChipsWiki / WikiChip contributors Scope: Memory controller (section 1) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Maximum memory — Memory controller (section 1) | Published analysisChipsWiki / WikiChip contributors Scope: Memory controller (section 1) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Memory controllers — Memory controller (section 1) | Published analysisChipsWiki / WikiChip contributors Scope: Memory controller (section 1) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Memory channels — Memory controller (section 1) | Published analysisChipsWiki / WikiChip contributors Scope: Memory controller (section 1) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Memory bandwidth — Memory controller (section 1) | Published analysisChipsWiki / WikiChip contributors Scope: Memory controller (section 1) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Memory type — Memory controller / HBM 2 (section 2) | Published analysisChipsWiki / WikiChip contributors Scope: Memory controller / HBM 2 (section 2) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Maximum memory — Memory controller / HBM 2 (section 2) | Published analysisChipsWiki / WikiChip contributors Scope: Memory controller / HBM 2 (section 2) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Memory bandwidth — Memory controller / HBM 2 (section 2) | Published analysisChipsWiki / WikiChip contributors Scope: Memory controller / HBM 2 (section 2) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Camera, video & display | |
| Display count — Graphics / Integrated graphics (section 1) | Published analysisChipsWiki / WikiChip contributors Scope: Graphics / Integrated graphics (section 1) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Display count — Graphics / Discrete graphics (section 2) | Published analysisChipsWiki / WikiChip contributors Scope: Graphics / Discrete graphics (section 2) Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Packaging, power & physical analysis | |
| Listed TDP | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Additional specifications | |
| Designer | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Product family | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Platform | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Chipset | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Core name | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
| Maximum CPU sockets | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2018-07-16 Source-reported parameter; source revision 2018-07-16. Not an independent measurement. |
THE VISUAL EVIDENCE
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sku · Core i7-8709G