VLSI KoreaMICROARCHITECTURE
Alpha 21164
Specifications
14 SOURCE-LINKED FIELDS| Identity & fabrication | |
|---|---|
| Architecture name | Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| Foundry | Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| Foundry | Published analysisChipsWiki / WikiChip contributors Scope: manufacturer 2 Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| Introduction | Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| Process | Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| Architecture core count | Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| ISA | Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| Architecture predecessor | Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| Architecture successor | Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| CPU & clock domains | |
| CPU execution type | Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| CPU decode width | Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| Cache hierarchy | |
| L2 cache | Published analysisChipsWiki / WikiChip contributors Scope: core Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| L3 cache | Published analysisChipsWiki / WikiChip contributors Scope: motherboard Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
| Additional specifications | |
| Designer | Published analysisChipsWiki / WikiChip contributors Scope: architecture Source date: 2020-11-27 Source-reported parameter; source revision 2020-11-27. Not an independent measurement. |
Visual sources
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Sources and historical context
ChipsWiki / WikiChip contributors · third-party-report · source linked