Collection/Alchemy/Alchemy Au1500-500MBD

VLSI MUSEUM / ENGINEERING RECORD2001

Alchemy180 nm

sku

The engineering record starts here.

We have not yet identified a reliable public die photograph for this record. Its identity and documented evidence remain open to explore.

SKU / 2001

Alchemy Au1500-500MBD

AlchemyCPUAu1

Research connections

CompanyAlchemy ↗ArchitectureAu1 ↗Process180 nm ↗

WikiChip archive references

Matched archive addresses are research leads. Capture metadata alone does not verify a specification; field-level evidence is listed below.

alchemy/au1500-500mbd · 2022-06-27 ↗

Specifications

34 SOURCE-LINKED FIELDS

Identity & fabrication
Model name	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Model number	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Part number	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Market	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Announcement date	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Release date	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
ISA	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Architecture	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Stepping	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Stepping	Published analysisChipsWiki / WikiChip contributors Scope: core stepping 2 Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Stepping	Published analysisChipsWiki / WikiChip contributors Scope: core stepping 3 Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Foundry	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Process	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Process technology	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
CPU & clock domains
Base clock	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
CPU word size	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Cores	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Cache hierarchy
L1 cache	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
L1 instruction cache	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
L1 instruction organization	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
L1 instruction associativity	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
L1 data cache	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
L1 data organization	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
L1 data associativity	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Memory & interfaces
Maximum memory	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Memory type	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Memory ECC	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Memory controllers	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Memory channels	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Memory bandwidth	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Additional specifications
Designer	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Product family	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Maximum CPU sockets	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.
Core voltage	Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2022-03-16 Source-reported parameter; source revision 2022-03-16. Not an independent measurement.

THE VISUAL EVIDENCE

Visual sources

0 DOCUMENTED SOURCES

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Follow the connections

1 SOURCE-LINKED RELATIONSHIPS

implements architectureAu1microarchitecture

Explicit microarch infobox parameter; exact architecture identity match.

ChipsWiki / WikiChip contributors · Evidence

Record identity & scope

sku · Alchemy Au1500-500MBD

Alchemy au1500-500mbd