VLSI Koreasku
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Research connections
WikiChip archive references
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intel/core i7/i7-5775c · 2019-11-20 ↗Specifications
45 SOURCE-LINKED FIELDS| Identity & fabrication | |
|---|---|
| Record scope | Published analysisBuildCores community Scope: product-model |
| Part numbers | Published analysisBuildCores community Scope: product-model |
| Release year | Published analysisBuildCores community Scope: product-model |
| Series | Published analysisBuildCores community Scope: product-model |
| Architecture | Published analysisBuildCores community Matching source values (1)Broadwell · ChipsWiki / WikiChip contributors Scope: product-model |
| Process | Published analysisBuildCores community Matching source values (1)14 nm · ChipsWiki / WikiChip contributors Scope: product-model Source process label; mixed chiplet processes and marketing names retained. |
| Model name | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Foundry | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Model number | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Part number | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Part number | Published analysisChipsWiki / WikiChip contributors Scope: part number 2 Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Market | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Announcement date | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Release date | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Stepping | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| CPU & clock domains | |
| Core family | Published analysisBuildCores community Scope: product-model |
| Cores | Published analysisBuildCores community Matching source values (1)4 · ChipsWiki / WikiChip contributors Scope: product-model |
| Threads | Published analysisBuildCores community Matching source values (1)8 · ChipsWiki / WikiChip contributors Scope: product-model |
| Base clock | Published analysisBuildCores community Matching source values (1)3300 MHz · ChipsWiki / WikiChip contributors Scope: product-model |
| Boost clock | Published analysisBuildCores community Matching source values (1)3700 MHz · ChipsWiki / WikiChip contributors Scope: product-model |
| CPU word size | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Cache hierarchy | |
| L2 cache | Published analysisBuildCores community Scope: product-model |
| L3 cache | Published analysisBuildCores community Scope: product-model |
| L1 instruction cache | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| L1 instruction organization | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| L1 instruction associativity | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| L1 data cache | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| L1 data organization | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| L1 data associativity | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| L2 organization | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| L2 associativity | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| L3 associativity | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Memory & interfaces | |
| Memory types | Published analysisBuildCores community Scope: product-model |
| Memory channels | Published analysisBuildCores community Scope: product-model |
| Maximum memory | Published analysisBuildCores community Scope: product-model |
| Host interface | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Packaging, power & physical analysis | |
| Socket | Published analysisBuildCores community Scope: product-model |
| Listed TDP | Published analysisBuildCores community Matching source values (1)65 W · ChipsWiki / WikiChip contributors Scope: product-model Source-listed thermal design rating; not measured workload power. |
| Product packaging | Published analysisBuildCores community Scope: product-model |
| Thermal junction minimum | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Thermal junction maximum | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Additional specifications | |
| Designer | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| S-spec | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Product family | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
| Maximum CPU sockets | Published analysisChipsWiki / WikiChip contributors Scope: product-model Source date: 2019-03-24 Source-reported parameter; source revision 2019-03-24. Not an independent measurement. |
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Record identity & scope
sku · Intel Core i7-5775C